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AURA SOM/AURA Hardware/Power and Reset/System boot

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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History

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__FORCETOC__

[[File:TBD.png | center | 400px]]

* determines whether the boot is secure or non-secure

* performs some initialization of the system and clean-ups

* reads the OTP settings

* reads the mode pins to determine the primary boot device

* once it is satisfied, it executes the boot code

=== Boot options ===

~~Two options are available related to system~~ The default primary boot~~. They are~~ device is defined at the factory and identified by the Boot ~~field~~ Mode fileld of the ordering code as follows:

* 0: SPI NOR / SD option (SOM code: DAUxxx0xxxxR)

* 1: eMMC / SD option (SOM code: DAUxxx1xxxxR)

* 2: SPI NAND / SD option (SOM code: DAUxxx2xxxxR)

For both options ~~the selection of primary~~ an alternative boot ~~device~~ from SD/MMC card is ~~determined~~ provided, selectable by driving low the BOOT_MODE_SEL signal ~~as described in the following sections. BOOT_MODE_SEL is latched when processor reset is released~~.

~~In any case,~~ BOOT_MODE_SEL is latched when processor reset is released. The bootable SD/MMC card must be connected to the SD2 (USDHC2) bus. The iMX93x SoC uses some GPIOs to read the boot ~~process is managed by~~ configuration set on~~-chip boot ROM code that is described in detail in processor~~the SOM: for this reason the SOM's ~~Reference Manual~~ports UART1_TXD, UART2_TXD, SAI1_TXFS and SAi1_TXD0 are floating (high impedance) while CPU_PORn signal is low.

==== SPI NOR / SD option ====

Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (CPU_PORn) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader).

[[Category:AURA]]

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AURA SOM/AURA Hardware/Power and Reset/System boot

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