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!Secondary boot device (if failed primary)
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'''TBD'''
in case no valid image is found in XXXXX, boot ROM shall enable USB serial download mode automatically
→System boot
For both options an alternative primary boot from SD/MMC card is provided, selectable by driving low the BOOT_MODE_SEL signal. Bootable SD/MMC card connects via the SD2 (USDHC2) bus.
All boot modes provide 'single boot' mode, meaning that the Cortex-A55 is the first core to boot. See iMX93x refeerence manual for more details. If primary In any case, boot process is managed by on-chip boot fail '''TBD''ROM code that is described in detail in processor's Reference Manual.
{| class="wikitable"
!Ordering code 'Boot Mode' fileld
!BOOT_MODE_SEL
!Primary boot device
|-
| rowspan="2" |0
|0
|SD/MMC card on USDHC2
|-
|1
|FlexSPI NOR on FLEXSPI1
|-
| rowspan="2" |1
|0
|SD/MMC card on USDHC2
|-
|1
|eMMC on USDHC1
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| rowspan="2" |2
|0
|SD/MMC card on USDHC2
|-
|1
|FlexSPI NAND on FLEXSPI1
|}
Other options are available on-demand, however. DAVE Embedded Systems' team is available for additional information on this matter. If necessary, please contact [mailto:sales@dave.eu sales@dave.eu].
=== Note on boot signals: ===
* BOOT_MODE_SEL is latched when processor reset CPU_PORn is released. Inside the SOM, BOOT_MODE_SEL is pulled-up with 10 kohm.
* The iMX93x SoC uses some GPIOs to read the boot configuration set on the SOM: for this reason the SOM's ports UART1_TXD, UART2_TXD, SAI1_TXFS and SAI1_TXD0 are floating (high impedance) while CPU_PORn signal is low.
[[File:AURA-boot-opt.png | 800px]]
=== Note on boot ===
In case no valid image is found in primary boot device, boot ROM shall enable USB serial download mode automatically on USB OTG1.
===Important note for ''manufacture mode'' management===
When the internal boot and recover boot (if enabled) failed, the boot goes to the SD/MMC manufacture mode before the serial download mode.