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AURA SOM/AURA Hardware/Power and Reset/System boot

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[[File:TBD.png | center | 400px]]
=== Boot options ===
The default primary Two options are available related to system boot device is defined at the factory and . They are identified by the 'Boot Mode' fileld field of the ordering code as follows:
* 0: SPI NOR / SD option (SOM code: DAUxxx0xxxxR)
* 1: eMMC / SD option (SOM code: DAUxxx1xxxxRDAUxxx2xxxxR)* 2: SPI NAND / SD option (SOM code: DAUxxx2xxxxRDAUxxx1xxxxR)For both options an alternative the selection of primary boot from SD/MMC card device is provided, selectable determined by driving low the BOOT_MODE_SEL signalas described in the following sections. Bootable SD/MMC card connects via the SD2 (USDHC2) busBOOT_MODE_SEL is latched when processor reset is released.
All In any case, boot modes provide 'single process is managed by on-chip boot' mode, meaning ROM code that the Cortex-A55 is the first core to boot. See iMX93x refeerence manual for more detailsdescribed in detail in processor's Reference Manual.
If ==== SPI NOR / SD option ====Selection of primary boot fail '''TBD'''device is determined by the BOOT_MODE_SEL signal as follows:{| class* BOOT_MODE_SEL ="wikitable"0!Ordering code 'Boot Mode' fileld!BOOT_MODE_SEL!Primary boot device!Secondary ** primary boot device is SD2 (if failed primaryUSDHC2)|-| rowspan="2" |0|0|* boot ROM will try to boot a valid image from the SD/MMC card on USDHC2||-|1|FlexSPI first, and then from the SPI NOR on FLEXSPI1||-| rowspan="2" |1|0|SD/MMC card on USDHC2||-|1|eMMC on USDHC1||-| rowspan="2" |2|0|SD/MMC card on USDHC2||-|1|FlexSPI NAND on FLEXSPI1||}Other options are available on-demand, however. DAVE Embedded Systems' team In case no valid image is available for additional information on this matter. If necessaryfound, please contact [Mailto:sales@dave.eu|sales@dave.eu]. === Note on boot signals: ===ROM shall enable USB serial download mode automatically* BOOT_MODE_SEL is latched when processor reset is released.= 1 or floating* The iMX93x SoC uses some GPIOs to read the * primary boot configuration set on the SOM: for this reason the SOM's ports UART1_TXD, UART2_TXD, SAI1_TXFS and SAI1_TXD0 are floating (high impedance) while CPU_PORn signal device is low.SPI NOR flash connected to FLEXSPI[[File:AURA-** in case no valid image is found in SPI NOR flash, boot-opt.png | 800px]]ROM shall enable USB serial download mode automatically
==== eMMC / SD option ====
Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:
* BOOT_MODE_SEL = 0
** primary boot device is SD2 (USDHC2)
** in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically
* BOOT_MODE_SEL = 1 or floating
** primary boot device is eMMC connected to USDHC1
** in case no valid image is found in eMMC flash, boot ROM shall enable USB serial download mode automatically
'''TBD'''==== SPI NAND / SD option ====Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:* BOOT_MODE_SEL = 0** primary boot device is SD2 (USDHC2)** in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically * BOOT_MODE_SEL = 1 or floating** primary boot device is SPI NAND flash connected to FLEXSPI** in case no valid image is found in SPI NAND flash, boot ROM shall enable USB serial download mode automatically
in case no valid image is found in XXXXX, boot ROM shall enable USB serial download mode automatically
===Important note for ''manufacture mode'' management===
When the internal boot and recover boot (if enabled) failed, the boot goes to the SD/MMC manufacture mode before the serial download mode.
Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (CPU_PORn) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader).
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