|July October 2023

Over the decades, DAVE Embedded Systems has been sharpening tuning a tight qualification process for the products the company has been commissioned to design and manufacture. On one hand, this This process is engineered relentlessly improved and enhanced to cope with the challenging requirements of :* The system-on-chips these products are based on and* The industrial applications operating in harsh environmentswhere these products are utilized.This qualification process comprises several tests with different characteristics and goals. On One of these tests is specifically designed for verifying the other handresilience of DUT's power supply unit against supply voltage anomalies, it tackles the ever-increasing complexity of system-on-chips powering these products themselveswhich are pretty common in industrial environments. This Technical Note (TN for short) describes how we run this test.

The qualification process comprises several tests with different characteristics and goals== Power supply anomalies resilience test ==To make this test possible, DAVE Embedded Systems designed an ad hoc smart bench power supply denoted as PPSU. PPSU is used to power the DUT, which is the electronic device under test. One You can think of these tests PPSU as a programmable power waveform generator that is specifically designed for verifying also able to verify the resilience health status of the DUT's power . PPSU can generate an arbitrary supply unit (PSU) voltage that exhibits purposely anomalies such as glitches and non-monotonic ramps. A robust product is expected to be resilient against these stressing conditions. For instance, the following picture shows a typical supply voltage anomaliesused in such tests. After a regular 300ms 0-to-24V power-up ramp, which are pretty common the DUT is subject to four glitches that differ in industrial environmentsterms of duration and amplitude. This Technical Note (TN for short) describes how <br> [[File:PPSU3-example1.png|center|thumb|600x600px]]<br> In this context, by resilience we mean that either one of the following conditions occur: * DUT is not affected at all and continues to operate regularly * If it is inevitable that a hardware reset is triggered, DUT performs a warm reboot cycle and eventually returns to regular operating. Of course, the expected behavior depends strongly on the nature and severity of injected anomalies. After an anomaly is injected, PPSU verifies whether the DUT is operating properly or not and logs the test result. PPSU can also be programmed to run this the test cycle repeatedly for the desired number of iterations and optionally to stop if the testfails.

== Test description ==To make this Combining several test possible, DAVE Embedded Systems designed an ad hoc smart bench power supply denoted as PPSU. PPSU is used to power waveforms of different types and running these tests over the entire DUT, which is 's operating temperature range allow to achieve good confidence that the electronic device undert test. You can think PPSU as a programmable product's power waveform generator that is also able to verify supply unit (PSU) will not fail in the health status field because of "misbehaving" power supply. Furthermore, these tests are extremely useful to detect hardware design errors or more subtle situations like the DUTone described in [https://www.st. PPSU can generate an arbitrary supply voltage that exhibits purposely anomalies such as glitches of different duration and noncom/resource/en/application_note/an5861-stpmic1-auto-turnon-monotonic rampsstmicroelectronics. A robust product is expected to be resilient against these stressing conditionspdf this application note] by ST Microelectronics. This means that it is supposed not Thank to be affected at all or to perform a warm reboot cycle properly when it is inevitable a hardware reset is triggered. Of coursethe use of PPSU, during the expected behaviour strongly depends on qualification of the nature [[ETRA SBC/General Information/Block Diagram and severity of the injected anomaly. After the anomaly is injectedFeatures|ETRA Single Board Computer]], PPSU verifies whether the DUT is perating properly or not and logs the test result. PPSU can also be programmed we had been able to run the test cycle repeatedly for spot the desired number of iterations. As it operates issue illustrated in the industrial temperature range, this application note before STM released it can be publicly.

Combining several test waveforms == Hardware design ==PPSU is implemented in the form of different types (1) and running these test over a single PCB that can operate in two modes:* PPSUv2* PPSUv3.PPSUv2 is the entire DUT's operating temperature range allow to achieve good confidence that legacy mode utilized when the product's PSU will not fail PPSU board works in tandem with a PC. In this case, the field because of PC hosts some programs required to "misbehavingdepict" power suppliesthe desired supply voltage. AdditionallyOnce the waveform is defined, these tests are extremely useful it is encoded in a proprietary format and sent to detect problems due an FPGA that stores it in a RAM buffer. When the actual test starts, the logic implemented in the FPGA scans the encoded waveform and feed a DAC. The analog signal output by the DAC is amplified by the power stage connected to erroneous hardware design or more subtle situations like the one described in DUT.<br><br>[[httpsFile://wwwPPSU-PPSUv2.png|center|thumb|644x644px]]<br><br>PPSUv3 mode is an optimization of PPSUv2 mode.stAs depicted in the following image, in this case, the PPSU board is connected to an embedded platform equipped with an FMC connector.comFor instance, [[BoraXEVB|BoraX/resource/en/application_note/an5861-stpmic1-auto-turnon-stmicroelectronicsBoraXEVB]] system can be viable for this purpose.pdf The advantage of using this application note] by ST Microelectonicsapproach is the fact that the system is much more compact. During Also, it allows the qualification implementation of advanced functionalities for controlling the DUT. For example, the analog inputs of Xilinx Zynq 7000 SoC can be used to measure some DUT's signals during the power cycles for analyzing in more detail its health status while testing progresses.<br><br>[[ETRA SBC/General Information/Block Diagram and FeaturesFile:PPSU-PPSUv3.png|center|thumb|ETRA Single Board Computer404x404px]], we were able <br><br>The following image shows the PPSU PCB. The left section integrates the digital circuitry required to spot interface the FPGA. The right section includes the output stage of the DAC and the issue illustrated in stages that actually power the application note before its publicationDUT.<br><br> [[File:PPSU3-PCB.png|center|thumb|600x600px]]