Open main menu

DAVE Developer's Wiki β

Changes

AURA SOM/AURA Hardware/Pinout Table

3,307 bytes added, 10:10, 16 May 2023
no edit summary
|
|-
| rowspan="6" |J1.26|rowspan="6" |PDM_BIT_STREAM1| rowspan="6" |CPU.PDM_BIT_STREAM1| rowspan="6" |JG18| rowspan="6" |NVCC_3V3| rowspan="6" |IO| rowspan="6" ||Pin ALT-0|PDM.BIT_STREAM[1]|-|Pin ALT-1|M33.NMI|-|Pin ALT-2|SPI2.PCS1|-|Pin ALT-3|TPM2.EXTCLK|-|Pin ALT-4|LPTMR1.ALT3|-|Pin ALT-5|GPIO1.IO10|-| rowspan="2" |J1.28| rowspan="2" |WDOG_ANY| rowspan="2" |CPU.PDM_BIT_STREAM1|G18rowspan="2" |JG18| rowspan="2" |NVCC_3V3|I/Orowspan="2" |IO| rowspan="2" ||Pin ALT-0|WDOG1.WDOG_ANY|-|Pin ALT-5|GPIO1.IO15|-|J1.30|DGND|DGND| -| -|G
|
|
|
|-
|J1.32
|PMIC_STBY_REQ
|PMIC.PMIC_STBY_REQ
|40
|NVCC_BBSM_1V8
|O
|
|
|
|-
| rowspan="8" |J1.34
| rowspan="8" |GPIO_IO17
| rowspan="8" |CPU.GPIO_IO17
| rowspan="8" |R20
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO17
|-
|Pin ALT-1
|SAI3.MCLK
|-
|Pin ALT-2
|ISI.D[8]
|-
|Pin ALT-3
|LCDIF.D[13]
|-
|Pin ALT-4
|UART3.RTS_B
|-
|Pin ALT-5
|SPI4.PCS1
|-
|Pin ALT-6
|UART4.RTS_B
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[17]
|-
| rowspan="8" |J1.36
| rowspan="8" |GPIO_IO21
| rowspan="8" |CPU.GPIO_IO21
| rowspan="8" |T21
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO21
|-
|Pin ALT-1
|SAI3.TX_DATA[0]
|-
|Pin ALT-2
|PDM.CLK
|-
|Pin ALT-3
|LCDIF.D[17]
|-
|Pin ALT-4
|SPI5.SCK
|-
|Pin ALT-5
|SPI4.SCK
|-
|Pin ALT-6
|TMP4.CH1
|-
|Pin ALT-7
|SAI3.RX_BCLK
|-
| rowspan="3" |J1.38
| rowspan="3" |GPIO_IO29
| rowspan="3" |CPU.GPIO_IO29
| rowspan="3" |Y21
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|GPIO2_IO29
|-
|Pin ALT-1
|I2C3.SCL
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[29]
|-
| rowspan="8" |J1.40
| rowspan="8" |GPIO_IO07
| rowspan="8" |CPU.GPIO_IO07
| rowspan="8" |L21
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO07
|-
|Pin ALT-1
|SPI3.PCS1
|-
|Pin ALT-2
|ISI.D[1]
|-
|Pin ALT-3
|LCDIF.D[3]
|-
|Pin ALT-4
|SPI7.SCK
|-
|Pin ALT-5
|UART6.RTS_B
|-
|Pin ALT-6
|I2C7.SCL
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[7]
|-
| rowspan="8" |J1.42
| rowspan="8" |GPIO_IO25//CAN_H
| rowspan="8" |CPU.GPIO_IO25
CAN.CANH
| rowspan="8" |V21
7
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |optional CAN transceiver
|Pin ALT-0
|GPIO2_IO25
|-
|Pin ALT-1
|USDHC3.DATA1
|-
|Pin ALT-2
|CAN2.TX
|-
|Pin ALT-3
|LCDIF.D[21]
|-
|Pin ALT-4
|TMP4.CH3
|-
|Pin ALT-5
|DAP.TCLK_SWCLK
|-
|Pin ALT-6
|SPI7.PCS1
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[25]
|-
| rowspan="8" |J1.44
| rowspan="8" |GPIO_IO27//CAN_L
| rowspan="8" |CPU.GPIO_IO27
CAN.CANL
| rowspan="8" |W21
6
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |optional CAN transceiver
|Pin ALT-0
|GPIO2_IO27
|-
|Pin ALT-1
|USDHC3.DATA3
|-
|Pin ALT-2
|CAN2.RX
|-
|Pin ALT-3
|LCDIF.D[23]
|-
|Pin ALT-4
|TMP6.CH3
|-
|Pin ALT-5
|DAP.TMS_SWDIO
|-
|Pin ALT-6
|SPI5.PCS1
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[27]
|-
| rowspan="7" |J1.46
| rowspan="7" |GPIO_IO24
| rowspan="7" |CPU.GPIO_IO24
| rowspan="7" |U21
| rowspan="7" |NVCC_3V3
| rowspan="7" |IO
| rowspan="7" |
|Pin ALT-0
|GPIO2_IO24
|-
|Pin ALT-1
|USDHC3.DATA0
|-
|Pin ALT-3
|LCDIF.D[20]
|-
|Pin ALT-4
|TMP3.CH3
|-
|Pin ALT-5
|DAP.TDO_TRACESWO
|-
|Pin ALT-6
|SPI6.PSC1
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[24]
|-
| rowspan="3" |J1.48
| rowspan="3" |GPIO_IO28
| rowspan="3" |CPU.GPIO_IO28
| rowspan="3" |W20
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|GPIO2_IO28
|-
|Pin ALT-1
|I2C3.SDA
|-
|Pin ALT-7
|FLEXIO1.FLEXIO[28]
|}
 
----
[[Category:AURA]]
8,226
edits