ZERO SOM/ZERO Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

History
Issue Date	Notes
2025/07/01	First documentation release

Power Supply Unit (PSU) and recommended power-up sequence

Implementing a correct power-up sequence for RZ/T2H Renesas processor is not a trivial task because several power rails are involved.

ZERO SOM simplifies this task by embedding all the needed circuitry, according to the OSM standard control signals.

The following picture shows a simplified block diagram of PSU and voltage monitoring circuitry:

The PSU is composed of two main blocks:

• a sequencer, a device that generates the proper power-up/down sequence required by the SOC processor and surrounding memories
• some DC-DCs, that generate the different power rails of the SoM (3.3 V, 1.8 V 1.1 V and 0.8 V)

The monitoring circuit instead:

• monitors the different voltages generated by the DC-DCs
• synchronises the powering up/down of carrier board in order to prevent back power

Power-up sequence

The picture below shows the recommended order to power up an OSM SoM, focuses especially on the control signals of the carrier board.

• The module will start up as soon as the VIN_5V input voltage is applied. However, the device can be power-on when the PWR_BTN# signal rise up.
• When the SoM rails are stable, the SoM monitor circuit raises the CARRIER_PWR_EN signal: use this signal to switch-on the rails on the carrier board.
• Release the RESET_IN# signal only when the rails on the carrier are stable.
• Then the SoM reset circuit releases the RESET_OUT# signal, which is internally propagated to the SoC and memories.Use this signal as a reset for carrier peripherals.
  • The SoC generates the RSTOUT# signal when it exits reset: this signal is connected to ball P16 (use it for specific user case or as a monitor).

Additional notes

For more details on the reset circuit see Reset_scheme_and_control_signals section.

The OSM CARRIER_STBY# signal has not been implemented since no low-power operation modes have been foreseen for this SoM.

OSM contacts

The following table lists the contacts of ZERO SoM relating to the power circuit:

OSM contact	OSM name	Purpose	Required
AE4, AF4, AG4, AH3, AH4, AJ3, AJ4, AK4	VCC_IN_5V	Power input 5 V ±5 %	Yes
AE2, AE34, AF35, AG3, AH2, AH34, AJ35, AK3, AL2, AL34, AM13, AM16, AM19, AM22, AM35, AN3, AN6, AN9, AN11, AN15, AN18, AN21, AN33, AP2, AP5, AP8, AP13, AP16, AP19, AP22, AP25, AP28, AP31, AP34, AR14, AR17, AR20, AR26, AR29, AR32	GND	Power input	Yes
AA9	PWR_BTN#	Input open-drain 5 V, pull-up on SoM
V17	CARRIER_PWR_EN	Output CMOS 1.8 V	Yes
U17	RESET_IN#	Input open-drain 1.8 V, pull-up on SoM	Yes
Y14	RESET_OUT#	Output CMOS 1.8 V	Yes
P16	SOC_RSTOUT#	Output CMOS 3.3 V
AL33	Vendor Defined	Output open-drain 5 V, 3.3 V power good
C5	VCC_6_TEST	Monitor 3.3 V rail
AK32	Vendor Defined	Output open-drain 5 V, 1.8 V power good
Y16	VCC_3_TEST	Monitor 1.8 V rail
AK33	Vendor Defined	Output open-drain 5 V, 1.1 V power good
M19	VCC_2_TEST	Monitor 1.1 V rail
AL32	Vendor Defined	Output open-drain 5 V, 0.8 V power good
Y20	VCC_4_TEST	Monitor 0.8 V rail