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Hardware Manual (Diva)

91 bytes added, 08:36, 19 March 2018
Carrier board mating SO-DIMM connector - J1 pinout
| 153||EMAC0_PHY_LED_SPEED||ETHPHY.LED2/nINTSEL||2||||||||10kOhm pull-down
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| 154||NC/OUT_PMIC_VRTC//OUT_VDD3_SMPS//OUT_VDIG1||||||||||||By default , this pin must not be connected. Optionally , it can route power voltages generated by Diva PSU. This option is meant to allow monitoring of such voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 155||EMAC0_PHY_LED_LINK/ACT||ETHPHY.LED1/nREGOFF||3||||||||
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| 156||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 157||AM335X_GMII1_TXD3||CPU.[GMII1_TXD3/DCAN0_TX/RGMII1_TD3/UART4_RXD/MCASP1_FSX/MMC2_DAT1/MCASP0_FSR/GPIO0_16]||J18||||||||
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| 158||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 159||AM335X_GMII1_TXD2||CPU.[GMII1_TXD2/DCAN0_RX/RGMII1_TD2/UART4_TXD/MCASP1_AXR0/MMC2_DAT2/MCASP0_AHCLKX/GPIO0_17]||K15||||||||Internally connected to the WDT (if present) – HW option
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| 160||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 161||DGND||||||||||||
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| 162||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 163||AM335X_GMII1_RXDV||CPU.[GMII1_RXDV/LCD_MEMORY_CLK/RGMII1_RCTL/UART5_TXD/MCASP1_ACLKX/MMC2_DAT0/MCASP0_ACLKR/GPIO3_4]||J17||||||||
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| 164||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 165||AM335X_GMII1_MDIO_CLK||CPU.[MDIO_CLK/TIMER5/UART5_TXD/UART3_RTSN/MMC0_SDWP/MMC1_CLK/MMC2_CLK/GPIO0_1]||M18||||||||Internally connected to the ETH PHY
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| 166||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 167||AM335X_GMII1_MDIO_DATA||CPU.[MDIO_DATA/TIMER6/UART5_RXD/UART3_CTSN/MMC0_SDCD/MMC1_CMD/MMC2_CMD/GPIO0_0]||M17||||||||Internally connected to the ETH PHY
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| 168||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 169||AM335X_GMII1_COL||CPU.[GMII1_COL/RMII2_REFCLK/SPI1_SCLK/UART5_RXD/MCASP1_AXR2/MMC2_DAT3/MCASP0_AXR2/GPIO3_0]||H16||||||||Internally used for DDR power management (if required) – HW option
| 175||AM335X_GMII1_RXCLK||CPU.[GMII1_RXCLK/UART2_TXD/RGMII1_RCLK/MMC0_DAT6/MMC1_DAT1/UART1_DSRN/MCASP0_FSX/GPIO3_10]||L18||||||||
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| 176||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 177||AM335X_GMII1_TXCLK||CPU.[GMII1_TXCLK/UART2_RXD/RGMII1_TCLK/MMC0_DAT7/MMC1_DAT0/UART1_DCDN/MCASP0_ACLKX/GPIO3_9]||K18||||||||
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| 178||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 179||PMIC_CLK32OUT||PMIC.CLK32KOUT||PMIC.38||||||||
| 181||DGND||||||||||||
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| 182||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 183||PMIC_PWR_EN||CPU.PMIC_PWR_EN, PMIC.PWRHOLD||CPU.C6, PMIC.1||||||||
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| 184||NC/Monitoring||||||||||||By default , this pin must not be connected. Optionally , it can route power voltage voltages generated by Diva PSU. This option is meant to allow monitoring of such voltage voltages by carrier board circuitry. It is not meant to power carrier board devices. For more information , please contact technical support.
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| 185||PMIC_INT1||PMIC.INT1||45||||||||
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