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Programmable logic (Bora)

33 bytes added, 17:13, 25 March 2016
FPGA Bank 13 (Zynq 7020 only)
== FPGA Bank 13 (Zynq 7020 only) ==
N.B. Although BANK 13 is not available on Bora SOMs equipped with the XC7Z010 SOC, '''VDDIO_BANK13 pins must not be left open and must be connected anyway''', either to ground or to an external I/O voltage as described in [[Programmable_logic_(Bora)#Introduction | I/O banks table]].
The following table reports the available pins connected to bank 13:
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IO_L6N_T0_VREF_13 1098,15
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