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Please download Bora's leaflet from the following link: [http://www.dave.eu/sites/default/files/files/bora-leaflet.pdf]
=BORA Evaluation Kit=
BORA Evaluation Kit BELK-L-S is a development/test board designed to start working with the BORA platform and experimenting with the implemented features. The carrier board hosts a BORA CPU module and offers the following features:
* Gigabit Ethernet LAN
* SD/MMC socket
* 2x USB Host 2.0
* 1x Serial port
* FPGA banks
* GPIOs
* JTAG
* Add-on DVI input available
* Power supply: 12VDC
== Linux Evaluation Kit ==
Please refer to [[BELK|this page]] for more details.
== BORA technical details ==
=== Introduction ===
[http://www.dave.eu/products/zynq-bora Bora] is the new top-class Dual Cortex-A9 + FPGA CPU module by '''DAVE Embedded Systems''', based on the recent [http://www.xilinx.com/content/xilinx/en/products/silicon-devices/soc/zynq-7000.html Xilinx Zynq®-7000 Xilinx Zynq XC7Z010/XC7Z020] application processor. Thanks to BORA, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB. The use of this processor enables extensive system-level differentiation of new applications in many industry fields, where high performances and extremely compact form factor (85mm x 50mm) are key factors. Smarter system designs are made possible, following the trends in functionalities and interfaces of the new, state-of-the-art embedded products. BORA offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA together with a large set of high-speed I/Os (up to 5GHz). BORA enables designers to create rugged products suitable for harsh mechanical and thermal environments, allowing the development of the most advanced and robust products. Thanks to the tight integration between the ARM-based processing system and the on-chip programmable logic, designers are free to add virtually any peripheral or create custom accelerators that extend system performance and better match specific application requirements. BORA is designed and manufactured according to '''DAVE Embedded Systems''' Ultra Line specifications, in order to guarantee premium quality and technical value for customers who require top performances and flexibility. BORA is suitable for high-end applications such as medical instrumentation, advanced communication systems, critical real-time operations and safety applications.
The [[Bora_SOM#Hardware | Hardware]] section provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.
=== Block diagram ===
The following picture shows a simplified block diagram of Bora module.
[[File:Bora-bd.png|500px|center]]
=== Product Highlights ===
* Unmatched performance thanks to dual ARM Cortex-A9 @ 800 MHz
* All memories you need: on-board NOR and NAND Flash
* Enabling smarter system thanks to Artix-7 FPGA integrated on chip
* FPGA banks with wide-range PSU input (from 1.2V to 3.3V)
* Highest security and reliability: internal voltage monitoring and power good enable
* Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3V I/O
* Easy to fi t thanks to its small form factor
* Precise timing application thanks to on-board 5ppm RTC
=== Feature Summary ===
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| CPU||Xilinx Dual ARM Cortex-A9<br>ZYNQ XC7Z010/ZC7Z020 @ 800MHz ||
|-
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
|-
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
|-
| SRAM|| On-chip RAM, 256 KB ||
|-
| Storage||Flash NOR SPI (8, 16, 32 MB)<br>Flash NAND (all sizes, on request) ||
|-
|+ align="bottom" style="caption-side: bottom" | Table: CPU and Memories
|}
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
|-
| USB||Up to 2x 2.0 OTG ports ||
|-
| UARTs||Up to 2x UART ports ||
|-
| GPIO||Up to x lines, shared with other functions (interrupts available) ||
|-
| Networks||Ethernet 10/100/1000 Mbps ||
|-
| CAN||2x full CAN 2.0B compliant interfaces ||
|-
| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
|-
| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
|-
| Timers||2x triple timers/counters (TTC) ||
|-
| RTC ||On board (DS3232), external battery powered ||
|-
| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
|-
|+ align="bottom" style="caption-side: bottom" | Table: Peripherals
|}
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| FPGA model||Artix™-7||
|-
| Logic cells||28K to 56K||
|-
| LUTs||17K to 53K||
|-
| Flip flops||35K to 100K||
|-
| RAM||240KB to 560KB||
|-
| DSP slices||80 to 220||
|-
| Differential pairs||Up to 34 differential pairs for high freq. interfaces||
|-
|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
|}
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Supply Voltage||3.3V, on-board voltage regulation||
|-
| Active power consumption|| Please refer to [[Hardware_Manual_(Bora)#Power_consumption | Power consumption]] section||
|-
| Dimensions||85mm x 50mm||
|-
| Weight|| ||
|-
| MTBF|| ||
|-
| Operating temperature||0..70 °C<br>-40..+85 °C||
|-
| Connectors||3 x 140 pins 0.6mm pitch||
|-
|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
|}
=== Hardware ===
Please refer to [[Hardware Manual (Bora)]] for detailed hardware related information on Bora SOM.
==== Design Overview ====
Please refer to [[Design Overview (Bora)|this page]] for more details.
==== Mechanicals ====
Please refer to [[Mechanicals (Bora)|this page]] for more details.
==== Pinout ====
Please refer to [[Pinout (Bora)|this page]] for more details.
==== Power ====
Please refer to [[Power (Bora)|this page]] for more details.
==== Reset scheme ====
Bora provides several different resets signals. Please refer to [[Reset scheme (Bora)|Reset scheme]] for more details.
==== Processing system (PS) peripherals ====
Please refer to [[Processing system peripherals (Bora)|this page]] for more details.
==== Programmable logic (PL) ====
Please refer to [[Programmable logic (Bora)|this page]] for more details.
==== RTC ====
Please refer to [[RTC (Bora)|this page]] for more details.
==== Thermal IC ====
Please refer to [[Thermal IC (Bora)|this page]] for more details.
==== Watchdog ====
Please refer to [[Watchdog (Bora)|this page]] for more details.
This category collects all the pages specific to Bora modules and related carrier boards.
