DESK-MX6-L/Pheripherals/LVDS

History
Issue Date	Notes
2021/07/16	First DESK-MX6-L release
2022/03/07	DESK-MX6-L 3.0.0 release
2023/04/11	DESK-MX6-L 4.0.0 release

Peripheral LVDS

Device tree configuration

Here below an example of device tree configuration used on standard DAVE's kit for the AXELLite SOM:

From the carrier board device tree where two LVDS channel have been configured for a dual LVDS panel (two 800x480 18bit):

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		crtc = "ipu2-di0";
		status = "okay";
		primary;

		display-timings {
			native-mode = <&timing0>;
			timing0: am_800480stmqw_ta1 {
				clock-frequency = <33260000>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <128>;
				hfront-porch = <128>;
				vback-porch = <15>;
				vfront-porch = <30>;
				hsync-len = <10>;
				vsync-len = <2>;
			};
		};
	};

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		crtc = "ipu2-di1";
		status = "okay";

		display-timings {
			native-mode = <&timing1>;
			timing1: am_800480stmqw_ta1 {
				clock-frequency = <33260000>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <128>;
				hfront-porch = <128>;
				vback-porch = <15>;
				vfront-porch = <30>;
				hsync-len = <10>;
				vsync-len = <2>;
			};
		};
	};
};

From imx6qdl-axelcommon.dtsi:

&iomuxc {
...
...
    ipu1 {
        pinctrl_ipu1_1: ipu1grp-1 {
            fsl,pins = <
                MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
                MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
                MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
                MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
                MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
                MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
                MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
                MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
                MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
                MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
                MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
                MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
                MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
                MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
                MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
                MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
                MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
                MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
                MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
                MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
                MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
                MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
                MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
                MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
                MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
                MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
                MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
                MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
                MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
            >;
        };
    };
...
...
};

Accessing the peripheral

For enabling the two devices, it is required to instantiate both framebuffers with the related configuration, for example into the carrier device tree:

mxcfb1: fb@0 {
    memory-region = <&display_reserved>;
    compatible = "fsl,mxc_sdc_fb";
    disp_dev = "ldb";
    interface_pix_fmt = "RGB24";
    default_bpp = <32>;
    int_clk = <0>;
    late_init = <0>;
    status = "okay";
};

mxcfb2: fb@1 {
    compatible = "fsl,mxc_sdc_fb";
    disp_dev = "ldb";
    interface_pix_fmt = "RGB666";
    default_bpp = <16>;
    int_clk = <0>;
    late_init = <0>;
    status = "okay";
};

Linux messages at boot time

...
...
[    3.794432] mxc_sdc_fb fb@0: registered mxc display driver ldb
[    3.800471] mxc_sdc_fb fb@0: using reserved memory region at 0x4fc00000, size 2 MiB
[    3.808249] mxc_sdc_fb fb@0: assigned reserved memory node splashscreen
[    3.815046] mxc_sdc_fb fb@0: using memory region 0x4fc00000 0x4fdfffff
...
...

Additional information

LDB framebuffer can be accessed through the standard /dev/fbX fb device.

The configured framebuffer can be checked using standard fbset utility:

root@desk-mx6:~# fbset -fb /dev/fb0

mode "800x480-59"
    # D: 33.260 MHz, H: 31.201 kHz, V: 59.205 Hz
    geometry 800 480 800 480 16
    timings 30066 128 128 15 30 10 2
    rgba 5/11,6/5,5/0,0/0
endmode

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