Difference between revisions of "Reset scheme (Naon)"
DevWikiAdmin (talk | contribs) (→MRST (J2.102)) |
DevWikiAdmin (talk | contribs) (→PORSTn (J2.109)) |
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===PORSTn (J2.109)=== | ===PORSTn (J2.109)=== | ||
| + | PORSTn is a bidirectional open-drain signal. It is connected to: | ||
| + | * | ||
| + | |||
===RSTOUTn (J2.91)=== | ===RSTOUTn (J2.91)=== | ||
===CPU_RESETn (J2.15)=== | ===CPU_RESETn (J2.15)=== | ||
===JTAG_TRSTn (J2.100)=== | ===JTAG_TRSTn (J2.100)=== | ||
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Five different signals are provided by Naon SOM. FOllowing sections describes in more detail each one.
Contents
MRST (J2.102)[edit | edit source]
This pin is connected to HDRST signal (cold reset) of PMIC TPS659113. When high, this signals keeps PMIC in off mode and resets TPS659113 to default settings. MRST has a weak internal pulldown.
PORSTn (J2.109)[edit | edit source]
PORSTn is a bidirectional open-drain signal. It is connected to:
