Integration guide (Maya)

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Carrier board specific design guidelines[edit | edit source]


Please refer first to Carrier board design guidelines.
In this section hardware guidelines valid for MAYA are analized. The information provided here complete the Carrier board design guidelines for some specific interfaces.

Interfaces Guidelines[edit | edit source]

For interfaces not mentioned in this section, refer to the generic guidelines.

USB[edit | edit source]
PCB[edit | edit source]

Table listeb below integrated the general basic guidelines table

Parameter for USB Differential Pairs Min Typ Max
Max traces length - - 17"

LCD Interface[edit | edit source]

PCB[edit | edit source]

  • Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
  • Place series terminator near Maya Connector

VIN Interface[edit | edit source]

PCB[edit | edit source]

  • Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
  • Place series terminator near VIN source

RMII Interface[edit | edit source]

Schematic[edit | edit source]

  • use a standard RMII PHY device that support 50MHz Clock input mode
  • Set PHY address different from integrated PHY