Difference between revisions of "Integration guide (Maya)"
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==Introduction== | ==Introduction== | ||
This page provides useful information and resources to system designers in order to integrate Naon module in his/her application quickly. | This page provides useful information and resources to system designers in order to integrate Naon module in his/her application quickly. | ||
| Line 29: | Line 33: | ||
==== PCB ==== | ==== PCB ==== | ||
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils | * Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils | ||
| − | * | + | * Consider placing series terminations near Maya Connector |
| + | |||
=== VIN Interface === | === VIN Interface === | ||
==== PCB ==== | ==== PCB ==== | ||
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils | * Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils | ||
| − | * | + | * Consider placing series terminations near VIN source |
| + | |||
=== RMII Interface === | === RMII Interface === | ||
==== Schematic ==== | ==== Schematic ==== | ||
* use a standard RMII PHY device that support 50MHz Clock input mode | * use a standard RMII PHY device that support 50MHz Clock input mode | ||
* Set PHY address different from integrated PHY | * Set PHY address different from integrated PHY | ||
Latest revision as of 11:42, 10 January 2013
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Contents
Introduction[edit | edit source]
This page provides useful information and resources to system designers in order to integrate Naon module in his/her application quickly.
Hardware[edit | edit source]
Evaluation boards and reference designs[edit | edit source]
Several schematics are available in order to accelerate the design of carrier board hosting Maya SOM. Please note that, even if these schematics are derived from tested real-world applications, they are provided "as is" and they might be modified in order to adapt to your specific application.
Available schematics:
- MayaEVB-Lite: MayaEVB-Lite#Schematics
Carrier board design guidelines[edit | edit source]
This page provides general guidelines about how to implement carrier boards hosting SOM.
In the following sections further hardware guidelines valid for Maya are illustrated. The information provided here complete the Carrier board design guidelines for some specific interfaces.
Interfaces Guidelines[edit | edit source]
For interfaces not mentioned in this section, refer to the generic guidelines.
USB[edit | edit source]
PCB[edit | edit source]
Table listeb below integrated the general basic guidelines table
| Parameter for USB Differential Pairs | Min | Typ | Max |
| Max traces length | - | - | 17" |
LCD Interface[edit | edit source]
PCB[edit | edit source]
- Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
- Consider placing series terminations near Maya Connector
VIN Interface[edit | edit source]
PCB[edit | edit source]
- Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
- Consider placing series terminations near VIN source
RMII Interface[edit | edit source]
Schematic[edit | edit source]
- use a standard RMII PHY device that support 50MHz Clock input mode
- Set PHY address different from integrated PHY
