Difference between revisions of "Integration guide (Maya)"

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(Carrier board specific design guidelines)
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{{Applies To Maya}}
 
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{{WarningMessage|text=The information here provided are preliminary and subject to change.}}
 
 
==Introduction==
 
This page provides useful information and resources to system designers in order to integrate Naon module in his/her application very quickly.
 
 
Several topics are covered, ranging from hardware issues to manufacturing aspects.
 
==Hardware==
 
 
===Carrier board specific design guidelines===
 
===Carrier board specific design guidelines===
 
<br/>
 
<br/>
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In this section hardware guidelines valid for MAYA are analized. The information provided here complete the [[Carrier board design guidelines (SOM)|Carrier board design guidelines]] for some specific interfaces.
 
In this section hardware guidelines valid for MAYA are analized. The information provided here complete the [[Carrier board design guidelines (SOM)|Carrier board design guidelines]] for some specific interfaces.
  
==== Mechanical ====
 
TBD
 
 
==== Interfaces Guidelines ====
 
==== Interfaces Guidelines ====
 
For interfaces not mentioned in this section, refer to the generic guidelines.
 
For interfaces not mentioned in this section, refer to the generic guidelines.
 
===== USB =====
 
===== USB =====
====== Schematics ======
 
Maya supports 1 USB 2.0 OTG Full speed interface and 1 USB 2.0 Full speed device interface. See [[NaonEVB-Mid#Schematics]] page for further details to how properly connect USB in respect of EMI issue solving.
 
 
 
====== PCB ======
 
====== PCB ======
 
Table listeb below integrated the general basic guidelines table
 
Table listeb below integrated the general basic guidelines table
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| Max traces length ||-||-||17"
 
| Max traces length ||-||-||17"
 
|}
 
|}
 +
=== LCD Interface ===
 +
==== PCB ====
 +
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
 +
* Place series terminator near Maya Connector
 +
=== VIN Interface ===
 +
==== PCB ====
 +
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
 +
* Place series terminator near VIN source
 +
=== RMII Interface ===
 +
==== Schematic ====
 +
* use a standard RMII PHY device that support 50MHz Clock input mode
 +
* Set PHY address different from integrated PHY

Revision as of 08:06, 23 October 2012

Carrier board specific design guidelines[edit | edit source]


Please refer first to Carrier board design guidelines.
In this section hardware guidelines valid for MAYA are analized. The information provided here complete the Carrier board design guidelines for some specific interfaces.

Interfaces Guidelines[edit | edit source]

For interfaces not mentioned in this section, refer to the generic guidelines.

USB[edit | edit source]
PCB[edit | edit source]

Table listeb below integrated the general basic guidelines table

Parameter for USB Differential Pairs Min Typ Max
Max traces length - - 17"

LCD Interface[edit | edit source]

PCB[edit | edit source]

  • Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
  • Place series terminator near Maya Connector

VIN Interface[edit | edit source]

PCB[edit | edit source]

  • Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
  • Place series terminator near VIN source

RMII Interface[edit | edit source]

Schematic[edit | edit source]

  • use a standard RMII PHY device that support 50MHz Clock input mode
  • Set PHY address different from integrated PHY