Difference between revisions of "CAN interfaces (Naon)"
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DM8148 processor integrates two CAN controller knows as DCAN0 and DCAN1. | DM8148 processor integrates two CAN controller knows as DCAN0 and DCAN1. | ||
By default DCAN0 is connected to on-board CAN transceiver (TI SN65HVD232). CAN_H and CAN_L signals are routed to pins J1.96 and J1.98 respectively. Please note that CAN transceiver might be not populated on request. In this case DCAN0_TX and DCAN0_RX processor's signals are routed to J1.96 and J1.98 respectively. For more details about this option please contact [[HowTo_Contact_Sales_Support| Sales department]]. | By default DCAN0 is connected to on-board CAN transceiver (TI SN65HVD232). CAN_H and CAN_L signals are routed to pins J1.96 and J1.98 respectively. Please note that CAN transceiver might be not populated on request. In this case DCAN0_TX and DCAN0_RX processor's signals are routed to J1.96 and J1.98 respectively. For more details about this option please contact [[HowTo_Contact_Sales_Support| Sales department]]. | ||
Revision as of 08:58, 6 June 2012
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DM8148 processor integrates two CAN controller knows as DCAN0 and DCAN1.
By default DCAN0 is connected to on-board CAN transceiver (TI SN65HVD232). CAN_H and CAN_L signals are routed to pins J1.96 and J1.98 respectively. Please note that CAN transceiver might be not populated on request. In this case DCAN0_TX and DCAN0_RX processor's signals are routed to J1.96 and J1.98 respectively. For more details about this option please contact Sales department.
