Difference between revisions of "BoraEVB-Lite"
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|1, 10, 11, 16 || DGND || Ground || - | |1, 10, 11, 16 || DGND || Ground || - | ||
|- | |- | ||
| − | |2 || | + | |2 || IO_L16P_T2_13 || - || - |
|- | |- | ||
| − | |3 || | + | |3 || IO_L20P_T3_13 || - || - |
|- | |- | ||
| − | |4 || | + | |4 || IO_L16N_T2_13 || - || - |
|- | |- | ||
| − | |5 || | + | |5 || IO_L20N_T3_13 || - || - |
|- | |- | ||
| − | |6 || | + | |6 || IO_L22P_T3_13 || - || - |
|- | |- | ||
| − | |7 || | + | |7 || IO_L17P_T2_13 || - || - |
|- | |- | ||
| − | |8 || | + | |8 || IO_L22N_T3_13 || - || - |
|- | |- | ||
| − | |9 || | + | |9 || IO_L17N_T2_13 || - || - |
|- | |- | ||
| − | | | + | |12, 14 || VDDIO_BANK13 || - || - |
|- | |- | ||
| − | | | + | |13 || IO_L19P_T3_13 || - || - |
|- | |- | ||
| − | + | |15 || IO_L19N_T3_VREF_13 || - || - | |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |15 || | ||
| − | |||
| − | |||
|- | |- | ||
|} | |} | ||
Revision as of 14:04, 6 September 2013
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The information here provided are preliminary and subject to change. |
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Contents
Introduction[edit | edit source]
BoraEVB-Lite is a carrier board designed to host Bora system-on-module.
Block Diagram[edit | edit source]
The following picture shows Bora-EVB-Lite's block diagram:
Features[edit | edit source]
- 10/100/1000 Ethernet
- 1x USB OTG
- Serial port (RS232)
- 1x MicroSD
- External DDR3 SDRAM bank
- +12V power connector
- JTAG
- 2.54mm-pitch pin-strip connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
Known limitations[edit | edit source]
Board version CS040713 has the following limitations:
- USB OTG is not available
- MicroSD is not available
- DDR3 bank is not available
Connectors pinout[edit | edit source]
Pin strip connectors[edit | edit source]
JP2[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | IO_L19P_T3_34 | - | - |
| 3 | IO_L2P_T0_34 | - | - |
| 4 | IO_L19N_T3_VREF_34 | - | - |
| 5 | IO_L2N_T0_34 | - | - |
| 6 | IO_L18P_T2_34 | - | - |
| 7 | IO_L22P_T3_34 | - | - |
| 8 | IO_L18N_T2_34 | - | - |
| 9 | IO_L22N_T3_34 | - | - |
| 12 | IO_L15P_T2_DQS_34 | - | - |
| 13 | IO_L8P_T1_34 | - | - |
| 14 | IO_L15N_T2_DQS_34 | - | - |
| 15 | IO_L8N_T1_34 | - | - |
JP3[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | PS_MIO28_501 | - | - |
| 2, 10, 7, 15 | DGND | Ground | - |
| 3 | PS_MIO29_501 | - | - |
| 4 | PS_MIO34_501 | - | - |
| 5 | PS_MIO30_501 | - | - |
| 6 | PS_MIO35_501 | - | - |
| 8 | PS_MIO36_501 | - | - |
| 9 | PS_MIO31_501 | - | - |
| 11 | PS_MIO32_501 | - | - |
| 12 | PS_MIO37_501 | - | - |
| 13 | PS_MIO33_501 | - | - |
| 14 | PS_MIO38_501 | - | - |
| 16 | PS_MIO39_501 | - | - |
JP4[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | IO_L9P_T1_DQS_34 | - | - |
| 3 | IO_L21P_T3_DQS_34 | - | - |
| 4 | IO_L9N_T1_DQS_34 | - | - |
| 5 | IO_L21N_T3_DQS_34 | - | - |
| 6 | IO_L7P_T1_34 | - | - |
| 7 | IO_L20P_T3_34 | - | - |
| 8 | IO_L7N_T1_34 | - | - |
| 9 | IO_L20N_T3_34 | - | - |
| 12 | N.A. | N.A. | - |
| 13 | IO_L1P_T0_34 | - | - |
| 14 | IO_L6N_T0_VREF_34 | - | - |
| 15 | IO_L1N_T0_34 | - | - |
JP5[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | IO_L5P_T0_34 | - | - |
| 3 | IO_L17P_T2_34 | - | - |
| 4 | IO_L5N_T0_34 | - | - |
| 5 | IO_L17N_T2_34 | - | - |
| 6 | IO_L4P_T0_34 | - | - |
| 7 | IO_L16P_T2_34 | - | - |
| 8 | IO_L4N_T0_34 | - | - |
| 9 | IO_L16N_T2_34 | - | - |
| 12 | IO_L24P_T3_34 | - | - |
| 13 | IO_L23P_T3_34 | - | - |
| 14 | IO_L24N_T3_34 | - | - |
| 15 | IO_L23N_T3_34 | - | - |
JP6[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | IO_L16P_T2_13 | - | - |
| 3 | IO_L20P_T3_13 | - | - |
| 4 | IO_L16N_T2_13 | - | - |
| 5 | IO_L20N_T3_13 | - | - |
| 6 | IO_L22P_T3_13 | - | - |
| 7 | IO_L17P_T2_13 | - | - |
| 8 | IO_L22N_T3_13 | - | - |
| 9 | IO_L17N_T2_13 | - | - |
| 12, 14 | VDDIO_BANK13 | - | - |
| 13 | IO_L19P_T3_13 | - | - |
| 15 | IO_L19N_T3_VREF_13 | - | - |
JP7[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | xxx | - | - |
| 3 | xxx | - | - |
| 4 | xxx | - | - |
| 5 | xxx | - | - |
| 6 | xxx | - | - |
| 7 | xxx | - | - |
| 8 | xxx | - | - |
| 9 | xxx | - | - |
| 10 | xxx | - | - |
| 11 | xxx | - | - |
| 12 | xxx | - | - |
| 13 | xxx | - | - |
| 14 | xxx | - | - |
| 15 | xxx | - | - |
| 16 | xxx | - | - |
JP8[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | xxx | - | - |
| 3 | xxx | - | - |
| 4 | xxx | - | - |
| 5 | xxx | - | - |
| 6 | xxx | - | - |
| 7 | xxx | - | - |
| 8 | xxx | - | - |
| 9 | xxx | - | - |
| 10 | xxx | - | - |
| 11 | xxx | - | - |
| 12 | xxx | - | - |
| 13 | xxx | - | - |
| 14 | xxx | - | - |
| 15 | xxx | - | - |
| 16 | xxx | - | - |
JP9[edit | edit source]
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 10, 11, 16 | DGND | Ground | - |
| 2 | xxx | - | - |
| 3 | xxx | - | - |
| 4 | xxx | - | - |
| 5 | xxx | - | - |
| 6 | xxx | - | - |
| 7 | xxx | - | - |
| 8 | xxx | - | - |
| 9 | xxx | - | - |
| 10 | xxx | - | - |
| 11 | xxx | - | - |
| 12 | xxx | - | - |
| 13 | xxx | - | - |
| 14 | xxx | - | - |
| 15 | xxx | - | - |
| 16 | xxx | - | - |
Schematics[edit | edit source]
- ORCAD: coming soon
- PDF: coming soon
BOM[edit | edit source]
- Coming soon
Layout[edit | edit source]
- Coming soon
Mechanical[edit | edit source]
- DXF: coming soon
- IDF (3D): coming soon
