Difference between revisions of "BoraEVB-Lite"
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== Features == | == Features == | ||
| + | |||
| + | * 10/100/1000 Ethernet | ||
| + | * 1x USB OTG | ||
| + | * Serial port (RS232) | ||
| + | * 1x MicroSD | ||
| + | * External DDR3 SDRAM bank | ||
| + | * +12V power connector | ||
| + | * JTAG | ||
| + | * 2.54mm-pitch connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..) | ||
| + | |||
| + | |||
| + | == Known limitations == | ||
| + | |||
| + | Board version CS040713 has the following limitations: | ||
| + | |||
| + | * <red>USB OTG is not available</red> | ||
| + | * <red>MicroSD is not available</red> | ||
| + | * <red>DDR3 bank is not available</red> | ||
==Schematics== | ==Schematics== | ||
Revision as of 15:21, 31 July 2013
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The information here provided are preliminary and subject to change. |
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Contents
Introduction[edit | edit source]
BoraEVB-Lite is a carrier board designed to host Bora system-on-module.
Block Diagram[edit | edit source]
The following picture shows Bora-EVB-Lite's block diagram:
Features[edit | edit source]
- 10/100/1000 Ethernet
- 1x USB OTG
- Serial port (RS232)
- 1x MicroSD
- External DDR3 SDRAM bank
- +12V power connector
- JTAG
- 2.54mm-pitch connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
Known limitations[edit | edit source]
Board version CS040713 has the following limitations:
- <red>USB OTG is not available</red>
- <red>MicroSD is not available</red>
- <red>DDR3 bank is not available</red>
Schematics[edit | edit source]
- ORCAD: coming soon
- PDF: coming soon
BOM[edit | edit source]
- Coming soon
Layout[edit | edit source]
- Coming soon
Mechanical[edit | edit source]
- DXF: coming soon
- IDF (3D): coming soon
