Difference between revisions of "BXELK-TN-002: Non-intrusive continuous multi-gigabit transceivers link monitoring"

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(Proposed solution)
(Link monitoring)
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[[#REQ1|REQ1]], [[#REQ2|REQ2]] and [[#REQ3|REQ3]] specify in detail a generic requirement of ''non-intrusiveness''. In other words, it is required that the implementation of link monitoring function is virtually transparent to the other parts of the system. As a consequence,  
 
[[#REQ1|REQ1]], [[#REQ2|REQ2]] and [[#REQ3|REQ3]] specify in detail a generic requirement of ''non-intrusiveness''. In other words, it is required that the implementation of link monitoring function is virtually transparent to the other parts of the system. As a consequence,  
*application <u>software don't need any change when adding such functionality</u>
+
*<u>application software don't need any change when adding such functionality</u>
*additional <u>PL resources are neglectable</u> with respect to the Microblaze-based approach
+
*<u>additional PL resources are neglectable</u> with respect to the Microblaze-based approach
 
*last but not least, <u>physical link is not affected at all</u>: normal operating, while monitoring is continuously in progress, is guaranteed by the integrated circuitry of GTP/GTX transceivers<ref name="UG482">''UG482 7 Series FPGAs GTP Transceivers User Guide'', http://www.xilinx.com/support/documentation/user_guides/ug482_7Series_GTP_Transceivers.pdf</ref><ref name="UG476">''UG476 7 Series FPGAs GTX/GTH Transceivers User Guide'', http://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf</ref>.
 
*last but not least, <u>physical link is not affected at all</u>: normal operating, while monitoring is continuously in progress, is guaranteed by the integrated circuitry of GTP/GTX transceivers<ref name="UG482">''UG482 7 Series FPGAs GTP Transceivers User Guide'', http://www.xilinx.com/support/documentation/user_guides/ug482_7Series_GTP_Transceivers.pdf</ref><ref name="UG476">''UG476 7 Series FPGAs GTX/GTH Transceivers User Guide'', http://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf</ref>.
 
[[File:Borax-wp001 02.png|thumb|center|400px|Concept block diagram of the system with monitoring subsystem]]
 
[[File:Borax-wp001 02.png|thumb|center|400px|Concept block diagram of the system with monitoring subsystem]]
  
 
==Conclusions==
 
==Conclusions==

Revision as of 07:40, 24 September 2015

Info Box
BORA Xpress.png Applies to BORA Xpress

History[edit | edit source]

Version Date BELK version Notes
0.9.0 September 2015 3.0.0 Internal draft

Introduction[edit | edit source]

This White Papers describes a practical application of the asymmetric multi-processing (AMP) configuration illustrated here. Specifically, this technique is used to implement a non-intrusive continuous link monitoring mechanism for the Xilinx Zynq multi-gigabit serial transceivers[a].

The starting point for this work is represented by the Xilinx Application Notes XAPP743[1] and XAPP1198[2], thus reading of these documents is highly recommended. The issue that this White Paper addresses is the need to monitor multi-gigabit transceivers link status in a non-intrusive way and on the field[b]. Just imagine a product that is based on the architecture similar to the one depicted in the following figure. It is assumed that this architecture is quite representative of many real use cases.

Concept block diagram of the system without monitoring subsystem

A generic communication IP is implemented in Programmable Logic (PL) . This IP makes use of multi-gigabit transceivers to communicate with the peer at the other end of the physical link. On Processor Subsystem (PS) side, Linux operating system is used. On top of the kernel, several applications run, implementing high-level product's functionalities, including the management of sent and received data through the link shown in the figure. It is also assumed that the reliability of this link is a crucial factor for the successful product functioning. Thus a specific monitoring of its health has to be implemented in order to detect any deviation from normal working conditions that may affect link robustness such as:

  • medium/long-term drift of the physical link characteristics
  • significant part to part variations of such characteristics.

Additional requirements have to be met, that is monitoring function has to be substantially non-intrusive with respect to:

  • REQ1: the software applications running in the Linux realm
  • REQ2: the user functions implemented in PL
  • REQ3: the overall system functionality.

Link monitoring[edit | edit source]

Before illustrating a possible solution, some further considerations about requirements listed in previous section are illustrated.

REQ1, REQ2 and REQ3 specify in detail a generic requirement of non-intrusiveness. In other words, it is required that the implementation of link monitoring function is virtually transparent to the other parts of the system. As a consequence,

  • application software don't need any change when adding such functionality
  • additional PL resources are neglectable with respect to the Microblaze-based approach
  • last but not least, physical link is not affected at all: normal operating, while monitoring is continuously in progress, is guaranteed by the integrated circuitry of GTP/GTX transceivers[3][4].
Concept block diagram of the system with monitoring subsystem

Conclusions[edit | edit source]


Cite error: <ref> tags exist for a group named "lower-alpha", but no corresponding <references group="lower-alpha"/> tag was found, or a closing </ref> is missing

  1. Mike Jenkins, David Mahashin, XAPP743 (v1.0.1) Eye Scan with MicroBlaze Processor MCS, 28th October 2013
  2. Luis Bielich, XAPP1198 (v1.1) In-System Eye Scan of a PCI Express Link with Vivado IP Integrator and AXI4, 19th November 2014
  3. UG482 7 Series FPGAs GTP Transceivers User Guide, http://www.xilinx.com/support/documentation/user_guides/ug482_7Series_GTP_Transceivers.pdf
  4. UG476 7 Series FPGAs GTX/GTH Transceivers User Guide, http://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf