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with Vivado IP Integrator and AXI4'', 19th November 2014</ref>, thus reading of these documents is highly recommended. The issue that this White Paper addresses is the need to monitor multi-gigabit transceivers link status in a <u>non-intrusive way</u> and <u>on the field</u>{{efn|That is after product has been sold and it is operating.}}. Just imagine a product that is based on the architecture similar to the one depicted in the following figure. It is assumed that this architecture is quite representative of many real use cases.
[[File:Borax-wp001 01.png|thumb|center|400px|Concept block diagram of the system without monitoring subsystem]]
A generic communication IP is implemented in Programmable Logic (PL) . This IP makes use of multi-gigabit transceivers to communicate with the peer at the other end of the physical link. On Processor Subsystem (PS) side, Linux operating system is used. On top of the kernel, several applications run, implementing high-level product's functionalities, including the management of data sent and received data through the link shown in the figure. It is also assumed that the reliability of this link is a crucial factor for the successful product functioning. Thus a specific monitoring of its health has to be implemented in order to detect any deviation from normal working conditions that may affect link robustness such as:
*medium/long-term drift of the physical link characteristics
*significant part to part variations of such characteristics.
