Bureaucrats, dave_user, Administrators
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Created page with "<section begin="History" /> {| style="border-collapse:collapse; " ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History |- ! style="bo..."
<section begin="History" />
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |2024/01/13
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First documentationrelease
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|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
== Mezzanine Connectors ==
=== Description ===
RIALTO SBC has two mezzanine expansion connectors: J60 and J61.
J60 is a 10x1x2.54mm pin strip header connector.
[[File:RIALTO_SBC-J60-connector.png|thumb|center|500px|UART, I2C, GPIO connector (J60)]]
J61 is a 10x1x2.54mm pin strip header connector.
[[File:RIALTO_SBC-J61-connector.png|thumb|center|500px|VIN, 3V3, 5V, GPIO connector (J61)]]
===Signals ===
The following table describes the interface signals:
{| class="wikitable"
! latexfontsize="scriptsize" |Pin#
! latexfontsize="scriptsize" |Pin name
! latexfontsize="scriptsize" |Pin function
! latexfontsize="scriptsize" |GPIO
|-
|1
|UART2_RX_DATA
|I2C4_SDA, ECSPI3_SCLK
|GPIO1_IO21
|-
|10
|DGND
|Ground
|
|}
All the GPIO signals are 0-3.3V level.
=== Device mapping ===
==== GPIO ====
GPIOs are mapped into banks each of which contains 32 pins. They are named as GPIO<bank>_IO<pin>
Each pin can be addressed with an incremental number, calculated as follows: GPIO = 32 x (<bank> - 1) + <pin>
=== Device usage ===
==== GPIO ====
Under Linux the GPIOs can be manipulated su sysfs export or with the gpio tools.
<section end="Body" />
[[Category:RIALTO SBC]]
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |2024/01/13
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First documentationrelease
|-
|-
|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
== Mezzanine Connectors ==
=== Description ===
RIALTO SBC has two mezzanine expansion connectors: J60 and J61.
J60 is a 10x1x2.54mm pin strip header connector.
[[File:RIALTO_SBC-J60-connector.png|thumb|center|500px|UART, I2C, GPIO connector (J60)]]
J61 is a 10x1x2.54mm pin strip header connector.
[[File:RIALTO_SBC-J61-connector.png|thumb|center|500px|VIN, 3V3, 5V, GPIO connector (J61)]]
===Signals ===
The following table describes the interface signals:
{| class="wikitable"
! latexfontsize="scriptsize" |Pin#
! latexfontsize="scriptsize" |Pin name
! latexfontsize="scriptsize" |Pin function
! latexfontsize="scriptsize" |GPIO
|-
|1
|UART2_RX_DATA
|I2C4_SDA, ECSPI3_SCLK
|GPIO1_IO21
|-
|10
|DGND
|Ground
|
|}
All the GPIO signals are 0-3.3V level.
=== Device mapping ===
==== GPIO ====
GPIOs are mapped into banks each of which contains 32 pins. They are named as GPIO<bank>_IO<pin>
Each pin can be addressed with an incremental number, calculated as follows: GPIO = 32 x (<bank> - 1) + <pin>
=== Device usage ===
==== GPIO ====
Under Linux the GPIOs can be manipulated su sysfs export or with the gpio tools.
<section end="Body" />
[[Category:RIALTO SBC]]
