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===Carrier board specific design guidelines===
<br/>
In this section hardware guidelines valid for MAYA are analized. The information provided here complete the [[Carrier board design guidelines (SOM)|Carrier board design guidelines]] for some specific interfaces.
==== Interfaces Guidelines ====
For interfaces not mentioned in this section, refer to the generic guidelines.
===== USB =====
====== PCB ======
Table listeb below integrated the general basic guidelines table
| Max traces length ||-||-||17"
|}
=== LCD Interface ===
==== PCB ====
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
* Place series terminator near Maya Connector
=== VIN Interface ===
==== PCB ====
* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
* Place series terminator near VIN source
=== RMII Interface ===
==== Schematic ====
* use a standard RMII PHY device that support 50MHz Clock input mode
* Set PHY address different from integrated PHY
