Power consumption (Bora)

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Bora5-small.jpg Applies to Bora

Introduction

Providing maximum power consumption of a system-on-module (SOM for short) is virtually impossible because it is extremely hard to define the worst case. This is even more true in case of Bora, where this is affected by the software running on Processing System (PS) side and the Programmable Logic (PL) configuration.

For this reason, several real use cases have been considered rather than indicating a theoretical maximum power consumption value that would be useless for the majority of system integrators, because it likely would lead to an oversized power supply unit.

Again, it is worth to remember that Bora platform is so flexible that is practically impossible to test for all possible configurations and applications on the market. The use cases here presented should cover most of real-world scenarios. However actual customer application might require more power than values reported here. Generally speaking, application specific requirements have to be taken into consideration in order to size power supply unit and to implement thermal management properly.

The following sections describe in details the test beds that have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on Bora platforms [1]. These tests have been conducted in a climatic chamber that allows to set environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.

FPGA bitstream - that in turn is built upon this core - allocates most of FPGA resources. All of them are clocked by one clock signal whose frequency is selectable by the PS at runtime. This allows to flexibly change DUT current absorption and, consequently, the heat it generates.


[1] These tests are part of the standard qualification procedure of DAVE Embedded Systems products. Their primary goal is to verify proper operating of the DUT under conditions of usage that are extremely demanding. Data here reported have been excerpted from the logs generated by such tests.

Configuration #1

Testbed

Measurements have been performed on the following platform:

  • Bora SOM: DBRD5110I1R
    • this model is based on Zynq XC7Z020-1I (Tj: -40°C / +100°C)
  • carrier board: BoraEVB
  • processor frequency: 667 MHz
  • FPGA frequency
    • 30 MHz (Tamb = +85°C)
    • 150 MHz (Tamb = +-40°C)
  • U-Boot: 2014.07-00067-g4b98484 (Oct 24 2014 - 17:28:32) [belk-2.1.0]
  • Linux kernel: 3.15.0-bora-2.1.0-xilinx-00044-g372fcab #5 SMP PREEMPT Thu Oct 23 13:54:38 CEST 2014 armv7l GNU/Linux
  • root file system mounted over Gigabit Ethernet link.

Please note that, when Tamb has been set to +85°C, the Bora SOM has been coupled to a passive heat sink to prevent exceeding maximum Zynq's junction temperature.

At application level, PS executes concurrently several tasks including:

  • two instances of burnCortexA9
  • periodic reading of I2C RTC (Maxim DS3232M)
  • periodic reading of Zynq's ADCs
  • periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
  • one instance of memtester, exercising 50 MByte of SDRAM
  • endless loop of writing/reading/verifying operations on microSD card
  • periodic reading of I2C remote temperature sensor (TExas Instruments TMP421)
  • endless loop of writing/reading/verifying operations on memory stick connected to USB port.

Results

  • Tamb: temperature of the ambient surrounding the DUT
  • Tj_max: maximum Zynq's junction temperature measured during the test
  • P_max: maximum power absorption of Bora SOM
Tamb [°C] Tj_max [°C] FPGA clock frequency [MHz] P_max [W]
85 123.7 [1] 30 5.7
-40 22.8 150 7.0

[1] In spite of the use of heat sink, this value exceeds maximum valued declared by manufacturer. This is acceptable in case of stress tests, where it is possible that parts of the DUT get damaged.

Configuration #2

Testbed

Measurements have been performed on the following platform:

  • Bora SOM: DBRF5110C1R
    • this model is based on Zynq XC7Z020-3E (Tj: 0 / +100°C)
  • carrier board: BoraEVB
  • processor frequency: 867 MHz
  • FPGA frequency
    • 10 MHz (Tamb = +75°C)
    • 150 MHz (Tamb = +-40°C)
  • U-Boot: 2014.07-00068-g9070bdc (Oct 28 2014 - 10:18:52) [belk-2.1.0]
  • Linux kernel: 3.15.0-bora-2.1.0-xilinx-00044-g372fcab #5 SMP PREEMPT Thu Oct 23 13:54:38 CEST 2014 armv7l GNU/Linux
  • root file system mounted over Gigabit Ethernet link.

Please note that, when Tamb has been set to +75°C, the Bora SOM has been coupled to a fan-cooled heat sink to prevent exceeding maximum Zynq's junction temperature.

At application level, PS executes concurrently several tasks including:

  • two instances of burnCortexA9
  • periodic reading of I2C RTC (Maxim DS3232M)
  • periodic reading of Zynq's ADCs
  • periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
  • one instance of memtester, exercising 50 MByte of SDRAM
  • endless loop of writing/reading/verifying operations on microSD card
  • periodic reading of I2C remote temperature sensor (TExas Instruments TMP421)
  • endless loop of writing/reading/verifying operations on memory stick connected to USB port.

Results

  • Tamb: temperature of the ambient surrounding the DUT
  • Tj_max: maximum Zynq's junction temperature measured during the test
  • P_max: maximum power absorption of Bora SOM
Tamb [°C] Tj_max [°C] FPGA clock frequency [MHz] P_max [W]
75 100.8 10 4.1
-40 34.7 150 7.3

Configuration #3

Testbed

Measurements have been performed on the following platform:

  • Bora SOM: DBRD4110Q2P-01
    • this model is based on Zynq XQ7Z020-1Q (Tj: -40°C / +125°C)
  • carrier board: BoraEVB
  • processor frequency: 667 MHz
  • FPGA frequency
    • 40 MHz (Tamb = +85°C)
    • 150 MHz (Tamb = +-40°C)
  • U-Boot: 2013.04 (Aug 25 2014 - 23:52:57) [belk-2.1.0]
  • Linux kernel: 3.17.0-bora-2.1.0-xilinx-00053-gb95579a
  • root file system mounted over Gigabit Ethernet link.

Please note that, when Tamb has been set to +85°C, the Bora SOM has been coupled to a passive heat sink to prevent exceeding maximum Zynq's junction temperature.

At application level, PS executes concurrently several tasks including:

  • two instances of burnCortexA9
  • periodic reading of I2C RTC (Maxim DS3232M)
  • periodic reading of Zynq's ADCs
  • periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
  • one instance of memtester, exercising 50 MByte of SDRAM
  • endless loop of writing/reading/verifying operations on microSD card
  • periodic reading of I2C remote temperature sensor (TExas Instruments TMP421)
  • endless loop of writing/reading/verifying operations on memory stick connected to USB port
  • endless loop of writing/reading/verifying operations on NAND flash memory.

Results

  • Tamb: temperature of the ambient surrounding the DUT
  • Tj_max: maximum Zynq's junction temperature measured during the test
  • P_max: maximum power absorption of Bora SOM
Tamb [°C] Tj_max [°C] FPGA clock frequency [MHz] P_max [W]
85 140.0 [1] 40 7.0
-40 35.5 150 7.3

[1] In spite of the use of heat sink, this value exceeds maximum valued declared by manufacturer. This is acceptable in case of stress tests, where it is possible that parts of the DUT get damaged.