FAQs (Bora/BoraX)

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Bora5-small.jpg Applies to Bora
BORA Xpress.png Applies to BORA Xpress


This page collects all the Frequently Asked Question regarding Bora


Q: Where can I found Bora SOM information?

A: please refer to the following table:

Resource Description
Bora category page This page lists all the wiki pages regarding the Bora CPU module
Bora category page This page reports Bora SOM specification and basic information
Bora Hardware Manual This page points to the Bora Hardware Manual
Bora product page This is Bora web page on DAVE Embedded Systems website

System design

Q: Can you suggest some guidelines for the carrier board design?

A: As a starting point, you can refer to the Wiki page dedicated to the Carrier_board_design_guidelines_(SOM), that will highlight some best practices that applies to all SOMs. For specific information on Bora, please refer to the Bora Integration Guide Integration_guide_(Bora)

Using BELK

Q: It there a Board Support Package (BSP) for the Bora SOM? How is it integrated in Vivado?

A: BELK has been built around Vivado but some deviations from the default development approach suggested by Xilinx have been introduced, in order to push the modularization and the maintainability of the projects to the maximum extent. We recommend reading the Logical structure of Bora Embedded Linux Kit page and the "BELK Quick Start Guide" document.

Q: I've received the BELK package. How am I supposed to start working with it?

A: You can follow the steps listed below:

  1. Check the kit contents with the packing list included in the box
  2. Insert the SD into the card slot on the carrier board
  3. Connect the power supply adapter and the serial cable
  4. Start your terminal emulator program
  5. Switch on the power supply
  6. Monitor the boot process on the serial console
  7. Install and configure the development environment as described in the BELK Quick Start Guide.

Q: How can I update the BELK version?

A: All BELK source trees (FPGA project, U-Boot and Linux kernel) are provided as git repositories. This means that these components can be kept in sync and up to date with DAVE Embedded Systems repositories. Once the a git account is enabled, the developer can clone the repository and synchronize a source tree using git commands. For further details, please refer to section of the BELK Quick Start Guide or visit the How to update BELK page.

Q: I'm a Windows user. Can I use Git? How can I create the ssh RSA key?

A: The recommended Git tool for Windows is MsysGit (http://msysgit.github.io/). For detailed information, please refer to https://github.com/msysgit/msysgit/wiki. Please visit https://confluence.atlassian.com/display/BITBUCKET/Set+up+SSH+for+Git for some hints on how to set up SSH for GIT.

A simple Windows tool for generating the SSH RSA keys is PuTTYgen, which is part of the PuTTY project (http://www.chiark.greenend.org.uk/~sgtatham/putty/). Please refer to the official documentation (http://the.earth.li/~sgtatham/putty/0.63/htmldoc/Chapter8.html#pubkey-puttygen) for further details. For a quick guide, please visit this page: http://katsande.com/using-puttygen-to-generate-ssh-private-public-keys.

Q: Where can I found the BELK Quick Start Guide document?

A: this document is included in the BELK distribution, so purchasing a development kit is required for getting access to the BELK Quick Start Guide.

Q: Which software components am I supposed to install to start working with Bora?

A: The following software packages must be installed on the Zynq development server:

  • Vivado® Design Suite version 2013.3
  • Xilinx Software Development kit
  • Python 2.7.x (C:\Python27 must be the installation directory on Windows)
  • A Git tool (e.g. for Windows: MsysGit (http://msysgit.github.io/))

These tools can be installed either on Windows or Linux operating systems. Please note that, if you need to build U-Boot or Linux, or use features like booting from NFS, the development server should be a Linux host. Please note that the required disk space for a full installation (BELK, Xilinx development tools, source trees, ...) is approximatively 25 GB.

Q: Am I supposed to download any tools from the Xilinx web site?

A: Since we are not allowed to redistribute it, the Zynq 7000 development tools must be downloaded from the Xilinx website (http://www.xilinx.com/support/download/index.htm), in the WebPACK™ Edition, which is a free version that provides instant access to the fundamental Vivado features and functionality at no cost. Please note that:

  • Prior to downloading, you must register an account on the Xilinx.com website.
  • Both Vivado 2013.3 and the Xilinx SDK must be downloaded and installed.

200px-Emblem-important.svg.png Please note that sometimes the download of the Vivado 2013.3 full-package fails because of some download system malfunctioning, but unfortunately the problem is barely noticeable, except by performing the MD5 check of the downloaded file. In case of problems, we suggest using the Multi-File Download (available on the same web page), that splits the full package in a collection of smaller files. If you use the Multi-File Download to get the "Vivado (No SDK)" package, you must also download the "Software Development Kit - 2013.3" package. 200px-Emblem-important.svg.png

Q: Can I use Bora in an Asymmetric Multi Processing (AMP) configuration?

A: Yes, Zynq processor can be configured to run independent software stacks on each of its processor cores. BELK owners can get access to an application note that describes how to build the software components required to run a simple application on FreeRTOS running on the second Zynq core, while Linux runs on the first Zynq core. Please refer to Application Notes (Bora)

Q: I've just installed the tools on Linux and when I launch the "vivado" command, the build procesess fails. How can I solve this problem?

A: Please check the files bora.runs/bora_run_synth/runme.log, vivado.log, <vivado_build.log>. If you see messages like

INFO: [Common 17-78] Attempting to get a license: Synthesis
WARNING: [Common 17-301] Failed to get a license: Synthesis
Starting synthesis...

INFO: [Common 17-347] Attempting to get a license for feature 'Synthesis' and/or device 'xc7z020'
WARNING: [Common 17-348] Failed to get the license for feature 'Synthesis' and/or device 'xc7z020'
1 Infos, 1 Warnings, 0 Critical Warnings and 0 Errors encountered.
synth_design failed
ERROR: [Common 17-345] A valid license was not found for feature 'Synthesis' and/or device 'xc7z020'. Please run the Xilinx License Configuration Manager for assistance in determining
which features and devices are licensed for your system.
Failed to create directory: '/home/user/.Xilinx/Vivado/2013.3'
Failed to create the shortcut directory: '/home/user/.Xilinx/Vivado/2013.3/shortcuts'
Failed to create the layout directory: '/home/user/.Xilinx/Vivado/2013.3/layouts/application'
Run output will be captured here: /home/user/bora/bora-build-20131115-nobk/bora.runs/bora_run_impl/runme.log
[Fri Nov 15 11:41:07 2013] Waiting for bora_run_impl to finish...
[Fri Nov 15 11:41:15 2013] bora_run_impl finished
wait_on_run: Time (s): cpu = 00:00:00.43 ; elapsed = 00:00:08 . Memory (MB): peak = 589.242 ; gain = 3.996
Traceback (most recent call last):
  File "fpga-bit-to-bin.py", line 25, in <module>
    bitfile = open(args.bitfile, 'rb')
IOError: [Errno 2] No such file or directory: '/home/user/bora/bora-build-20131115-nobk/bora.runs/bora_run_impl/bora_design_wrapper.bit'
    while executing
"exec $cmd fpga-bit-to-bin.py --flip $proj_dir/bora.runs/bora_run_impl/bora_design_wrapper.bit $proj_dir/bora.runs/bora_run_impl/bora_design_wrapper.bi..."
    invoked from within
"if {$bitstream == "-bitstream"} {
	puts "Generating BITSTREAM"
	reset_run -quiet bora_run_impl
	reset_run -quiet bora_run_synth
	launch_runs -verbose ..."
    (file "build_project.tcl" line 113)

please check the permissions of the /home/user/.Xilinx directory and make sure that the actual user has full access to that directory:

$ ll -d /home/user/.Xilinx/
drwxrwxrwx 6 root root 4096 Apr 17  2013 /home/user/.Xilinx//

Q: Why my cross-compiled application doesn't work with the pre-packaged root file system provided with BELK?

A: as a general rule, dynamically linking an application against libraries built with a different toolchain can cause malfunctioning in the application. Since this pre-built root file system is not generated using the same cross-toolchain used for building the BELK software components, we recommend to choose one of the following options:

  • if a native compiler is available on the root file system, go for native compilation instead of cross-compilation
  • when you cross-compile, rely on static linking and avoid dynamic linking against the root file system libraries
  • build your application using the same cross-toolchain (when available) used for building the root file system

Q: How can I configure the Bora system to boot from network?

A: Booting from network is very helpful during the software development (both for kernel and applications). The kernel image is downloaded via TFTP while the root file system is remotely mounted via NFS from the host. It is assumed that the development host:

  • is connected with the target host board through an Ethernet LAN
  • exports the directory containing the root file system for the target through the NFS server
  • runs a TFTP server.
  • has a proper subnet IP address

For detailed information, please refer to Configuration net_nfs

Q: What if NAND/NOR flash is unverified according to Xilinx classification?

Bora SOM may be equipped with a NAND or NOR flash devices that are tagged as Unverified according to Xilinx nomenclature (see here and here for more details). All DAVE Embedded Systems SOMs are built upon devices - including but not limited to NAND and NOR flashes - that are submitted to severe qualification process, whether or not they previously have been verified by the system-on-chip manufacturer (Xilinx in this case).

The qualification process is based on internal procedures that are extensively used and tested across different embedded platforms and operating systems. These procedures are continuously updated to keep pace with technology evolution and are relentlessly improved according to data collected from products installed and operating on the field.